Senior Physical Design Engineer - Barcelona, España - Esperanto

Esperanto
Esperanto
Empresa verificada
Barcelona, España

hace 1 mes

Isabel García

Publicado por:

Isabel García

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Descripción
We are looking for a Sr. Physical Design Engineer with experience working on SOCs, IPs and Hierarchical blocks.

This is an exciting opportunity to be part of a fast-paced Startup culture doing world-class ASICs on AI, ML Processor Chips at advanced process technology nodes.


Responsibilities

  • Experience with full chip integration, full chip planning, power grid, bumps AP routing, full chip timing closure, EMIR, Physical verification, and packaging support is desirable and preferred.
  • Experience with chiplets and Die to Die is desirable.

Qualifications

  • Bachelors or Masters in Electrical Engineering or equivalent
  • 10+ years ASIC Physical Design experience. Successful tapeouts at the latest technology nodes (7nm experience preferred)
  • Strong interpersonal and collaboration skills
  • Experience with large SOCs that utilize 3rd Party design IP
  • Knowledge of advanced and highly automated RTL to GDS flows including timing budgeting, synthesis, place & route, static timing analysis (STA), logic equivalence checking (LEC), EMIR, and LVS/DRC
  • Strong engineering mindset, startup mentality, versatility, and interpersonal skills Demonstrates good judgment in selecting methods and techniques for obtaining solutions
  • Proficiency with EDA tools: FC, DC, ICC2, StarRC, Primetime, ICV, Redhawk, mPower, etc.
  • Experience in full product life cycle from 1st Tapeout to metal spins to full silicon production
  • Proficiency in using scripting languages like TCL, Perl, etc.
  • Experience with UPF and lowpower multivoltage designs
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