Senior Layout Engineer- Layout Verification Finfet - Barcelona, España - European Recruitment

European Recruitment

Empresa verificada

Barcelona, España

hace 3 semanas

Publicado por:

Isabel García

beBee Recruiter

Descripción

We are partnered up with a well-established Global Semiconductor organisation with over 20 years in the market who are have offices in Porto,Lisbon and Barcelona and are looking for a Senior Layout Engineer.

Responsibilities:

Deep understanding of FinFET process and matching requirements
Familiar with all Layout verification DRC/LVS/ANT/ESD and be able to solve/debug issues independently.
Chip floor planning, device placement, routing, verifications, layout/design reviews.
Understanding of hierarchical planning and integration, chip design from blocklevel to toplevel for highspeed mixed signal ICs.
Work independently & be able to collaborate with Design, CAD, Technology Development & Package team

Whats in it for you?

Hybrid work options
Relocation Packages
Competitve salary

Qualifications:

5+ years of experience with strong fullcustom Analog / Mixed Signal layout skills.
Experience with Cadence LVS/DRC tools (QRC, Star RC, Calibre), Cadence Virtuoso XL (VXL) tools.
Data management tools in a Unix environment.

Keywords:
FinFet Technology / DRC/ LVS/ ANT/ ESD