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    Principal Digital Design Engineer - Barcelona, España - Monolithic Power Systems

    Monolithic Power Systems
    Monolithic Power Systems Barcelona, España

    hace 2 semanas

    Default job background
    Regular De jornada completa
    Descripción

    Principal Digital Design Engineer

    Job Summary:

    The ideal candidate should have a proven track record in digital design and verification/infrastructure development for digital FPGAs/ASICs. Key skills required include technical and project leadership within the digital team, proficiency in RTL design, and familiarity with backend flow and tools. The role involves both technical expertise and leadership qualities to oversee the development of PMICs, collaborating closely with various teams to shape the key aspects of ASIC/pwr mgmt. ICs that align with product requirements. The candidate will take on the lead design role, provide verification support, and focus technically on specific devices or sections. Additionally, they will assist in pre/post-silicon design validation and offer support to the Design/ATE/Application & Systems group.

    MPS products encompass switching regulators, sensors, motor control, display drivers, audio amplifiers, and power management ICs tailored for rapidly expanding markets like broadband modems, notebooks, cell phones, telecom, fiber optics, digital cameras, automobiles, and network equipment.

    Essential Functions:

    • Support and develop chip/digital level architecture and functional blocks.
    • Provide technical documentation including specifications, block diagrams, and requirements.
    • Collaborate with various departments/stakeholders for design resolution.
    • Develop verification techniques and methodology at system and chip level.
    • Guide ASIC or FPGA design from concept to implementation.
    • Oversee the development of test plans and automated test cases.
    • Contribute to synthesis, timing closure, and formal verification.
    • Create scripts to automate design and verification.
    • Manage tasks completion to target schedule.

    Qualifications:

    • PhD/BS/MS in Electrical Engineering with focus on Digital Design/VLSI coursework.
    • Minimum of 10 years' experience in ASIC or FPGA design and verification.
    • Proficiency in DV languages (Verilog, SystemVerilog, UVM) and regression testcase development.
    • Expertise in programming languages (C/C++, shell, Perl, TCL, Python, etc.).
    • Solid understanding of the entire ASIC Digital Design Flow.
    • Knowledge of industry standard ASIC tools/flows.
    • Strong communication skills and teamwork abilities.
    • Desirable experience with automotive standards and embedded MCU designs.
    • Fluency in Chinese is a plus.

    Location:

    • Barcelona
    • Portugal (Lisbon/Porto)
    • Netherlands (Enschede/Nijmegen)
    • Switzerland (Tolochenaz)
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