Hardware Verification Engineer - Barcelona, España - Codasip

Codasip
Codasip
Empresa verificada
Barcelona, España

hace 3 semanas

Isabel García

Publicado por:

Isabel García

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Descripción

TL;


DR :
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_Digital Design Verification - Application cores - CodAL - RISC-V ISA - Processor Microarchitecture - OOP - Linux-capable cores - CPU - Start-up culture - Soft IP_**- Locations: Spain (Barcelona)_


  • Department: Spanish Design Center_
  • Employment Type: Full-Time_
  • Flexible working hours, including working from home_
  • Experience: Mid-Senior Level _

WHY WE ARE HIRING:

YOUR CORE RESPONSIBILITIES WILL BE:

  • Verify modern RISC-V processors and their components to raise the quality of our deliverables
  • Create a presilicon verification environment, automated tests, and checkers
  • Design generic solutions and process automation
  • Hunt for bugs by creating and using smart algorithms
  • Come up with and realize your own ideas on how to improve, automate or upgrade our technologies on even higher level (you will definitely get our support)

Requirements:

YOU NEED TO POSSESS THE FOLLOWING KNOWLEDGE AND SKILLS:

  • Passion for electronics or embedded SW
  • Experience with Hardware verification (VHDL/Verilog simulation, Formal or UVM)
  • Knowledge of versioning tools (Git preferred)
  • Practical usage of Linux
  • Software writing skills (C++ or Python preferred)
  • Experience in Object-Oriented Programming
  • Communicative English. Our team is highly distributed, so English is the main language
  • Eagerness to think outside the box
  • Selforganization and reliability

NICE-TO-HAVES:

  • Desire to play a role in shaping the RISC-V world of tomorrow
  • Knowledge of HDL languages (Verilog, VHDL, or System Verilog)
  • DIY activities related to opensource software, home automation, robotics, or similar
  • University degree in a related field (Microelectronics, HW design, Embedded SW, Robotics or similar)

Benefits

HOW YOU CAN BE ENRICHED:

  • Opportunity to work with RISC-V, computer architecture of the future
  • Working on innovative IoT processors and unique processor optimization technology
  • Participation in the whole development process from analysis to deployment
  • Opportunity to collaborate with experienced developers located in the UK, France, Greece, Germany, Spain, Poland, and the Czech Republic
  • Learn and enhance our verification methodologies, using combinations of assertions, random instruction stream generators, online and offline checkers, bestinclass formal tools, various coverage metrics, architecture compliance testing, etc.

WHO IS CODASIP:


Codasip was founded on a simple belief - we could bring together the brilliance of microprocessor architects and software engineers and capture it in tools that make the design simpler, faster, and less expensive.

The company was created in 2014 with the mission of democratizing processor design by utilizing our own CodAL architecture description language.


Nowadays Codasip is a leading supplier of processing solutions for IC designers, offering products based on open standards such as the RISC-V ISA, LLVM, and UVM.

We are a founding member of RISC-V International (formerly RISC-V Foundation) and we were the first company to offer a commercial RISC-V IP core in 2015.

With almost 200 employees and offices in Europe, the US, and China, we are constantly open for talents who want to work on cutting-edge processor technologies, believe in the great potential of RISC-V.


WHAT IS OUR COMPANY CULTURE:
We celebrate a highly professional and open environment, with a well-balanced mix of young and experienced engineers.

We employ agile methodologies to bring the speed and ease of software development to hardware as well as to guarantee the high quality of our products.

A perfect platform for growth, that will enable you to learn from the best and at the same time drive your own ideas - that is the Codasip DNA.


SOME USEFUL LINKS ON CODASIP:

  • Codasip RISC V Processor Solutions
  • Design for differentiation: architecture licenses in RISC‐V
  • Building a Swiss cheese model approach for processor verification
  • Efficient verification of RISC-V processors
  • Technical paper

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